MSP430 Tutorial

MSP430 Hardware Tools


Design Considerations for In-Circuit Programming

JTAG Standard Interface

With the proper connections, the debugger and an FET hardware JTAG interface (such as the MSPFET430PIF and MSP-FET430UIF) can be used to program and debug code on the target board. In addition, the connections also support the MSP-GANG430 or MSP-PRGS430 production programmers, thus providing an easy way to program prototype boards, if desired.

The following shows the connections between the 14-pin FET interface module connector and the target device required to support in-system programming and debugging for 4-wire JTAG communication.



The following shows the connections for 2-wire JTAG mode (Spy-Bi-Wire).


MSP430 JTAG 2 Wire Pin-Out used by MSP430F5xx and MSP430F6xx Devices


The 4-wire JTAG mode is supported on most MSP430 devices, except devices with low pin counts (for example, MSP430G2230). The 2-wire JTAG mode is available on selected devices only. See the Code Composer Studio for MSP430 User's Guide (SLAU157)

The MSP430 family supports the standard JTAG interface which requires four signals for sending and receiving data. The JTAG signals are shared with general-purpose I/O. The TEST/SBWTCK pin is used to enable the JTAG signals. In addition to these signals, the RST/NMI/SBWTDIO is required to interface with MSP430 development tools and device programmers.

The JTAG pin requirements are shown in the following Table:


The difference between the "VCC TOOL" and "VCC TARGET" above is as follows:

  • "VCC TOOL" is basically an output line from the debugger/programmer tool which is used when the target MSP430 is to be powered from the debugger/progammer tool
  • "VCC TARGET" is an input line for the debugger/programmer tool which is used when the target MSP430 is to be powered by an independent on-board power supply. This line is then used by the programmer/debugger tool for sensing and then adjusting the voltage level of the JTAG lines (TDO, TDI, etc.) so it will not violate the specification of voltage range which can be applied to any pin (usually specified as -0.3V to VCC+0.3V)

Spy-Bi-Wire Interface MSP430F5529

In addition to the standard JTAG interface, the MSP430 family supports the two wire Spy-Bi-Wire interface. Spy-Bi-Wire can be used to interface with MSP430 development tools and device programmers. The Spy-Bi-Wire interface pin requirements are shown in Table 6-6. For a complete description of the features of the JTAG interface and its implementation, see MSP430 Programming Via the JTAG Interface (SLAU320)


Flash Memory

The flash memory can be programmed through the JTAG port, Spy-Bi-Wire (SBW), the BSL, or in-system by the CPU. The CPU can perform single-byte, single-word, and long-word writes to the flash memory. Features of the flash memory include:

  • Flash memory has n segments of main memory and four segments of information memory (A to D) of 128 bytes each. Each segment in main memory is 512 bytes in size.
  • Segments 0 to n may be erased in one step, or each segment may be individually erased.
  • Segments A to D can be erased individually. Segments A to D are also called information memory
  • Segment A can be locked separately